NVIDIA / Individual accelerator
NVIDIA H100 SXM
A documented commercial SXM accelerator; this record does not establish supplier stock or an Aguasto allocation.
Manufacturer specification reference
- Architecture
- HopperNVIDIA H100 GPU specifications (external source) · HGX H100, H200 and B200 reference architecture components (external source) · CUDA GPU Compute Capability (external source)
- Category
- Individual acceleratorNVIDIA H100 GPU specifications (external source) · HGX H100, H200 and B200 reference architecture components (external source) · CUDA GPU Compute Capability (external source)
- Accelerator memory
- 80 GBPer H100 SXM accelerator, excluding host memory; not H100 NVL.NVIDIA H100 GPU specifications (external source)
- Memory bandwidth
- 3.35 TB/sPeak GPU memory bandwidth per SXM accelerator, not NVLink bandwidth.NVIDIA H100 GPU specifications (external source)
- Power
- 700 WMaximum configurable GPU TDP, not server input or facility power.NVIDIA H100 GPU specifications (external source)
- Precision formats
- FP64, FP32, TF32, BF16, FP16, FP8, INT8NVIDIA H100 GPU specifications (external source)
- Cooling / integration
- SXM server integration; verify the OEM server cooling design. H100 NVL PCIe air-cooling specifications must not be applied to this SXM record.NVIDIA H100 GPU specifications (external source) · HGX H100, H200 and B200 reference architecture components (external source) · CUDA GPU Compute Capability (external source)
Configuration boundaries
- The headline fields select the SXM variant. H100 NVL has a different capacity, power range and form factor.
- Manufacturer peak Tensor Core throughput values may include structured sparsity; do not treat them as measured tokens per second.
Published arithmetic throughput
| Specification | Precision | Published peak | Boundary & source |
|---|---|---|---|
| FP8 peak compute | FP8 | 3,958 TFLOPS | One H100 SXM; manufacturer peak Tensor Core specification with sparsityManufacturer source ↗ |
Deployment considerations
- Reserve accelerator memory for KV cache, activations and serving overhead in addition to model weights.
- Check server topology and collective communication behavior before choosing tensor or pipeline parallelism.
Software ecosystem
CUDA. Confirm the exact model, runtime release, server integration and vendor support matrix before evaluating a deployment.
Sources & verification
Reference revision 1 · Reviewed . Manufacturer claims and documentation are attributed; Aguasto has not run the cited products in production.
- NVIDIA H100 GPU specifications ↗
Hopper architecture; SXM memory 80 GB; SXM bandwidth 3.35 TB/s; SXM maximum configurable TDP 700 W; precision support; SXM versus NVL variant distinction. Publication: date not stated in the reviewed source. Verified: 2026-10-12.
- HGX H100, H200 and B200 reference architecture components ↗
H100 SXM HBM3 memory type. Publication: date not stated in the reviewed source. Verified: 2026-10-12.
- CUDA GPU Compute Capability ↗
CUDA product identification for H100, H200, B200, B300, GB200 and GB300. Publication: date not stated in the reviewed source. Verified: 2026-10-12.